Semiconductor Engineering

An Optimal Path To DFT Automation

To keep up with time-to-market demands when SoCs keep increasing in size and complexity requires the adoption of better DFT flows and technologies. One of the most successful changes in ...
Electronic Design

Automotive design example illustrates hierarchical DFT architecture

Fort Worth, TX. Designs keep scaling and taking on a lot of complexity, according to Ron Press, technology enablement director at Mentor Graphics. Delivering a corporate presentation Wednesday on the ...
Semiconductor Engineering

Hierarchical DFT On A Flat Layout Design

The use of hierarchical DFT methods is growing as design size and complexity stresses memory requirements and design schedules. Hierarchical DFT divides the design into smaller pieces, creates test ...
EDN

Filter banks, part 2: Optimization and synthesis

Before we proceed, let's quickly review our filter bank example. Our example, shown in Figure 1, is a size 16 DFT filter bank. The color scheme shows the sample rate change where a 16 MHz input sample ...