Yahoo Finance

Alliance Memory Launches New 8M Low-Power CMOS SRAM With 2.7-V to 3.6-V Power Supply in TSOP-I Package

SAN CARLOS, CA--(Marketwired - May 25, 2016) - Alliance Memory today expands its line of legacy low-power CMOS SRAMs with a new 8M IC (512K x 16 bit) in the 48-pin 12-mm by 20-mm TSOP-I package.
EDN

Low-power 32M CMOS SRAM in a 12x20mm TSOP-I package

Alliance Memory has expanded its line of legacy low-power CMOS SRAMs with a new 32M IC (2M x 16 / 4M x 8 switchable), the company's highest density low-power device to date. Operating from a single ...
EDN

8M Low-Power CMOS SRAM

Alliance Memory announced the expansion of its line of legacy low-power CMOS SRAMs with a new 8M IC (512K x 16 bit) in the 48-pin 12-mm by 20-mm TSOP-I package. Available from a very limited number of ...
Electronics Weekly

EUV lithography makes first 22nm CMOS SRAM

Belgian research lab IMEC has revealed what it claims is the world’s first functional 22nm CMOS SRAM cells made using EUV lithography. “The 0.099µm 2 SRAM cells are made with FinFETs and have both the ...
Electronic Design

Crolles2 Alliance reveals ultra-dense SRAM cell in 45 nm conventional bulk CMOS

The Crolles2 Alliance, which includes Freescale Semiconductor, Philips and STMicroelectronics, has created six-transistor SRAM-bit cells with an area of less than 0.25 square microns, or about half ...
Semiconductor Engineering

Zeno Semi Expands On-Chip Memory

San Jose, Calif.-based startup Zeno Semiconductor is testing modifications and a smaller process node for the single-transistor 28nm SRAM chip it introduced in 2016, which could boost space for ...
Design-Reuse

IMEC presents functional 22nm SRAM cells fabricated using EUV technology

LEUVEN, BELGIUM - APRIL 22, 2009 - Today, IMEC presented the world's first functional 22nm CMOS SRAM cells made using EUV lithography. The 0.099µm² SRAM cells are made with FinFETs and have both the ...
Electronic Design

Functional 22nm CMOS SRAM CellsArrive

Leuven, Belgium: IMEC, the independent research centre for nanoelectronics and nanotechnology, is laying claim to the first functional 22nm CMOS SRAM cells. Shown is a 22nm SRAM array after metal1 ...
Semiconductor Engineering

SRAM-Based IMC For Cryogenic CMOS Using Commercial 5 nm FinFETs

A technical paper titled “Cryogenic In-Memory Computing for Quantum Processors Using Commercial 5-nm FinFETs” was published by researchers at University of Stuttgart, Indian Institute of Technology ...
Design-Reuse

Low Power 7T SRAM Cell Scheme - ''Saving Write Zero Power''

This paper presents a Seven-transistor SRAM cell intended for the advanced microprocessor. A low power write scheme, which reduces SRAM power by using seven-transistor sense-amplifying memory cell, ...