HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed-language simulation for ASIC and FPGA devices, announced today the release of Active-HDL 8.1. The new release introduces a ...

Lattice Semiconductor and Aldec, Inc. today announced that Lattice will offer its customers a special edition of Aldec's Active-HDL Designer Edition tools for FPGA design. The Active-HDL Lattice ...

Code Snooper, a code coverage software tool for use with the Active-HDL design and verification environment is integrated with the Active-HDL simulation kernel and does not require additional ...

Developed for Xilinx devices, the Active-HDL 4.2XE achieves a 40% increase in simulation speed over the previous 4.0XE version. Users now have the ability to seamlessly import Xilinx Foundation Series ...

To increase the overall awareness of EDA’s importance in development of electronics, Henderson, Nevada-based mixed-language simulator and design tool supplier for ASIC and FPGA devices Aldec Inc. said ...